Description
GE DS200UCPBG6AFB
Product Introduction
When a Mark V turbine controller develops an I/O-engine processor fault, replacing the wrong revision can create a much larger commissioning problem than the original failure. The GE DS200UCPBG6AFB is the UCPB I/O Engine CPU Board used within the Mark V turbine control architecture. It contains an 80486DX processor, memory circuitry, serial communications, and an ARCNET interface for handling and distributing I/O-engine data.
The GE DS200UCPBG6AFB is a legacy processor board, so procurement should be driven by exact hardware revision and system compatibility rather than appearance alone. The board works with the Mark V I/O-engine architecture and is associated with the STCA/AAHA hardware environment; its processor packages I/O information and broadcasts scheduled data over the COREBUS architecture. For turbine control maintenance, this makes the DS200UCPBG6AFB particularly relevant to like-for-like Mark V replacement, spare-board programs, and controlled legacy-system refurbishment.
Key Technical Specifications
| Parameter | Specification |
|---|---|
| Product Model | DS200UCPBG6AFB |
| Manufacturer | General Electric |
| Product Series | Mark V / DS200 |
| Functional Description | I/O Engine CPU Board |
| Functional Acronym | UCPB |
| Application | GE Mark V turbine control systems |
| Processor | Intel 80486DX |
| Memory | SIMM-based DRAM with EPROM/flash memory |
| Serial Communications | 2 × RS-232 |
| Network Interface | ARCNET driver |
| Board Supply | +5 V DC |
| Hardware Configuration | 7-position switch block; multiple board connectors |
| Jumper Configuration | JP1 and JP3 identified for factory testing |
| Associated Architecture | Mark V I/O Engine / COREBUS |
| Board Revision | Functional revision A / F; artwork revision B |
| Mounting Role | I/O Engine processor board |
| Product Status | Legacy / obsolete |
| Manual Reference | GEH-6153 |
The available technical documentation identifies the DS200UCPBG6AFB as an I/O Engine CPU Board with an 80486DX processor, one SIMM socket, EPROM/flash memory, two RS-232 serial ports, and an ARCNET driver. The revision designation is important: this specific assembly carries the A/F functional revision combination and B artwork revision.
Application Scenarios & Pain Points
A Mark V processor-board replacement is a different job from replacing a conventional PLC CPU. The board participates in a distributed turbine-control architecture, and its firmware, memory, network behavior, and revision history all matter.
- Gas and steam turbine control: The UCPB performs I/O-engine processing within GE Mark V turbine control systems, handling information exchanged between the I/O hardware and the wider control architecture.
- I/O Engine processing: The processor packages analog and digital I/O information and broadcasts scheduled data through the COREBUS architecture. Critical information can be transmitted at a 100 Hz task rate.
- Legacy Mark V maintenance: The board is useful when an operating turbine still depends on its original Speedtronic Mark V architecture and a processor-level replacement is required.
- Spare-board strategy: Because the Mark V is a legacy platform, maintaining a tested spare can reduce the time spent troubleshooting an intermittent processor or communication fault during an outage.
Field note: Do not approve a replacement simply because the silk-screened part number starts with DS200UCPBG6. The complete suffix AFB matters. I would also compare the board revision, memory configuration, installed firmware, and the failed board’s switch/jumper state before putting the replacement into a live turbine controller.
DS200UCPBG6AFB
Related Products
- DS200UCPBG5AFB — Related Mark V UCPB processor-board variant; compare hardware revision and system configuration before substitution.
- DS200UCPBG6ADA — Same UCPB family with a different revision configuration; not automatically interchangeable with the AFB version.
- DS200UCPBG7AHB — Later UCPB variant listed within the Mark V DS200 family; exact firmware and hardware compatibility requires verification.
- DS200STCA — Associated Mark V I/O-engine LAN/interface hardware; the UCPB participates in the I/O-engine communication architecture alongside related boards.
- DS200UCVAG1ABB — Mark V printed circuit board used in the wider turbine-control architecture; function is different from the UCPB CPU board.
- DS200UCIAG1A — Mark V motherboard-type assembly; it should not be treated as a functional substitute for the UCPB.
- DS200UDSAG1A — Mark V excitation-related board; relevant to the broader turbine-control system but not a CPU replacement.
- DS200UPLAG1A — Mark V LAN power-supply board; supports a different portion of the system architecture.
Engineer’s Guide — Field Pitfalls to Avoid
1. Do not substitute by the base number alone
The Mark V DS200 family contains multiple UCPB revisions. The has its own functional and artwork revision combination, and those details should be preserved when sourcing a replacement.
Avoidance tip: Photograph the complete original board label before removal. Record the full DS200 number, revision markings, PROM/EPROM identifiers, and any configuration settings.
2. Firmware and memory configuration are part of the replacement decision
The UCPB contains processor and memory resources used by the I/O Engine. A board that passes a basic power-up check can still be unsuitable if its firmware or memory configuration does not match the turbine controller.
Avoidance tip: Preserve the original board’s firmware and memory information whenever possible. For a critical turbine outage, verify the replacement against the site’s existing Mark V configuration before installation.
3. Do not overlook ARCNET and serial communications
The board is not simply a local CPU. It includes an ARCNET driver and two RS-232 serial ports, which are part of its communication role inside the Mark V architecture.
Avoidance tip: Inspect connectors, cable condition, communication hardware, and associated boards when diagnosing a communication-related failure. Swapping the CPU board without checking the network path can lead to a repeat failure.
4. Record switch and jumper positions before removal
The documented UCPB configuration includes a seven-switch block and hardware jumpers, with JP1 and JP3 identified for factory testing.
Avoidance tip: Photograph the configuration before removing the original board. Never assume that a replacement board should retain whatever switch positions it arrived with.
5. Treat ESD control as mandatory
This is a processor and memory board containing multiple semiconductor devices and memory components. Static discharge during handling can create intermittent faults that are difficult to diagnose once the board is installed.
Avoidance tip: Use a grounded ESD workstation, appropriate wrist protection, and antistatic packaging. Avoid touching connector contacts or exposed component leads.
FAQ
What is the GE ?
The is a GE Mark V I/O Engine CPU Board, identified by the functional acronym UCPB. It provides processor and communication resources for an I/O Engine within the Mark V turbine-control architecture.
What processor does the use?
Available technical documentation identifies an Intel 80486DX processor. The board also includes memory circuitry, including a SIMM socket for DRAM and EPROM/flash devices used by the control-board software environment.
What communication interfaces are on the ?
The board is documented with two RS-232 serial ports and an ARCNET driver. Its I/O-engine function also involves the Mark V COREBUS data architecture.
Is interchangeable with DS200UCPBG7AHB?
It should not be assumed to be a direct replacement. Both are listed in the Mark V DS200 UCPB family, but their revision and hardware configurations differ. A replacement decision should be based on the complete board number, firmware, memory configuration, and the particular Mark V installation.
What is the difference between UCPB and a Mark V I/O board such as TCQA?
They perform different jobs. The UCPB is the I/O Engine CPU/processing board, while boards such as TCQA handle specific I/O signal conditioning and processing functions. The UCPB receives/packages I/O-engine information and communicates that data within the control architecture.
What should be checked before purchasing a replacement ?
At minimum, verify the complete part number, functional/artwork revision, processor and memory configuration, firmware/PROM information, switch settings, connector condition, and compatibility with the existing Mark V I/O Engine. For a turbine outage, a documented bench test is preferable to an unverified power-on check.
Is the a current-production GE board?
It is a legacy Mark V DS200 board, not a current-generation turbine controller component. Current availability therefore tends to involve existing inventory, unused legacy stock, refurbished boards, or repair services rather than normal new-production supply.
